j c/ , d nc. 20 stern ave. springfield, new jersey 07081 u.s.a. telephone: (973) 376-2922 (212)227-6005 fax: (973) 376-8960 powermos transistor logic level fet buk552-100a/b general description n-channel enhancement mode logic level field-effect power transistor in a plastic envelope. the device is intended for use in switched mode power supplies (smps), motor control, welding, dc/dc and ac/dc converters, and in automotive and general purpose switching applications. pinning - to220ab quick reference data symbol vd, is f ds(on) parameter buk552 drain-source voltage drain current (dc) total power dissipation junction temperature drain-source on-state resistance; vgs = 5 v max. -100a 100 10 60 175 0.28 max. -100b 100 8.5 60 175 0.35 unit v a w c q pin configuration symbol pin 1 2 3 tab description gate drain source drain tab 123 limiting values limiting values in accordance with the absolute maximum system (iec 134) thermal resistances symbol vds k +vgsm id id 'dm ?tot ' stg 'i parameter drain-source voltage drain-gate voltage gate-source voltage non-repetitive gate-source voltage drain current (dc) drain current (dc) drain current (pulse peak value) total power dissipation storage temperature junction temperature conditions rgs = 20 kq tp < 50 jis tmb = 25 c tmb=100'c tmb = 25 c tmb = 25 c min. -55 max. 100 100 15 20 -100a 10 7 40 -100b 8.5 6 34 60 175 175 unit v v v v a a a w c c symbol p "^th j-mb rth j-a parameter thermal resistance junction to mounting base thermal resistance junction to ambient conditions min. - typ. 60 max. 2.5 unit k/w k/w nj semi-conductors reserves the right to change test conditions, parameter limits and package dimensions without notice. information furnished by nj semi-conductors is believed to be both accurate and reliable at the time of going to press. however, nj serni-conductors assumes no responsibility for any errors or omissions discovered in its use. nj semi-conductors encourages customers to verify that datasheets are current before placing orders. quality semi-conductors
powermos transistor logic level fet buk552-100a7b static characteristics tmb = 25 c unless otherwise specified symbol v(br)dss vgs(to) idss idss igss rds(on) parameter drain-source breakdown voltage gate threshold voltage zero gate voltage drain current zero gate voltage drain current gate source leakage current drain-source on-state resistance conditions vos = ov; id = 0.25ma vds = vcs; id = 1 ma vds = 100 v; vgs = 0 v; j. = 25 "c vds=100v;vgs = ov;t^125-c vgs = 15v;vds = ov vgs = 5v; buk552-100a id = 5.5 a BUK552-100B min. 100 1.0 typ. 1.5 1 0.1 10 0.25 0.3 max. 2.0 10 1.0 100 0.28 0.35 unit v v ^a ma na q ii dynamic characteristics tmb = 25 c unless otherwise specified symbol gfa ciss coss crss *don t, tdoff tf ld ld ls parameter forward transconductance input capacitance output capacitance feedback capacitance turn-on delay time turn-on rise time turn-off delay time turn-off fall time internal drain inductance internal drain inductance internal source inductance conditions vds = 25 v; id = 5.5 a vgs = 0 v; vds = 25 v; f = 1 mhz vdd = 30 v; id = 3 a; vgs = 5 v; rgs = 50 q; rgen = 50 q measured from contact screw on tab to centre of die measured from drain lead 6 mm from package to centre of die measured from source lead 6 mm from package to source bond pad min. 4.5 ~ - - typ. 6 400 90 35 12 45 50 30 3.5 4.5 7.5 max. - 600 120 50 18 70 70 45 - unit s pf pf pf ns ns ns ns nh nh nh reverse diode limiting values and characteristics tmb = 25 c unless otherwise specified symbol 'dr 'drm vsd trr qrr parameter continuous reverse drain current pulsed reverse drain current diode forward voltage reverse recovery time reverse recovery charge conditions ip =10 a; vgs = ov lf=10a;-dlf/dt=100a/^is; vgs = 0 v; vr = 30 v min. - - typ. 1.2 90 0.35 max. 10 40 1.5 - unit a a v ns hc avalanche limiting value tmb = 25 c unless otherwise specified symbol wdss parameter drain-source non-repetitive undamped inductive turn-off energy conditions id = 10a;vdd<50v; vgs = 5 v ; rgs = 50 q min. ~ typ. ~ max. 30 unit mj
powermos transistor logic level fet buk552-100a/b jnn pd% normalised power derating 80 - 50 - 40 10 s 0 20 fig-1. s x s, n k, s \ s v| v s s s s s 40 60 so 100 120 140 160 tmb / c normalised power dissipation. 180 id% normalised current derating ?*? k. ?v ?s v, s, v, x s s s \ 1 0 20 40 60 80 100 120 140 160 180 tmb / c fig.2. normalised continuous drain current. id% = 100-lo/lox c = f(tmb); conditions: vgs>5v 100- 10- 1 - id// \i n-- ? i? -^i -' jfy f: n :!i^ ^ "" dc .a { \ b s^ ^ ^ \ ^ , ^; _. ? , 1 tp= -! ^00 , 10 us s u ; 1 to 100 vds/v fig.3. safe operating area. tmb = 25 c id & idm = f(vds); idm single pulse; parameter tp 1e+01 zth j-mb / (k/w) 1e-02 1e-07 1e-05 1e-03 1e-01 1e+01 t/s fig.4. transient thermal impedance. , = w); parameter d = t/t id /a 10 0 -i ( fig. 5 ft f^ . -> t> vuti / //, w' w 7 /v = / // w> ys -^ ss // . ' /^ '/ r*^ ^. // '/ ' j--' 10 s "^l. ^*~ ^ , ?=? --- , ^--^ ?? ? =? f a 4 3 2 4 6 8 10 vds/v pical output characteristics, 7~ = 25 'c. id = f(vds); parameter vgs rds(on)/ohm 0 ( fig.t s ) \ s '- := = ,--- z= = s ^ ^= =^ 1. 5 ? - \ss **? b ? j 4 ?? v ^* = 3s/\ > ^-- b= ) ^-* r? / ? 5 -^ t? - / ^ -~ 1 *-~" 5 ^ s* r-" r 7 / ^ 11 2 4 6 8 10 12 14 16 18 20 id /a typical on-state resistance, tj = 25 c. rostov = wo); parameter vgs
powermos transistor logic level fet buk552-100a/b -n id/a 0 fig. 7. ld = f(vgs) ^* / / / s / i/ t//c / / // 77 / / / // // //l_ :z5/ / / / ,' / / / / / ' /- ^' ... 1hll 2468 vgs/v typical transfer characteristics. ; conditions: vds = 25 v; parameter tt gfs/s i i / / f f l/ / x ^-- ? --, ~~, ?~- -^, ~^ ~-~, "x s 0 2 4 6 b 10 12 14 16 18 20 id /a fig. 8. typical transconductance, t, = 25 'c. 9* = wo); conditions: vds = 25v a normalised rds(on) = 1(tj) 0.4 ^~- _ ? ? ^, ^ ^ ^ ^ i s / / > / / / / / -60 -20 20 60 100 140 180 tjl c fig. 9. normalised drain-source on-state resistance. a = f^os(on/^ds(qn)2s 'c = f(tj); id = 5.5 a; vgs = 5 v vgs(to)/v "?*- ^^ ?--, =^, ^^ ._ ~"~-- ?^ ? ""-- -~_^ ? -, '^^ ' ~-~- "~^ max. "--. typ. min. -~-^ ^ ~-~^ "-- _^ ~^- -, ? __ ~~~-- ?~~~. "~ -?-.. --.. -60 -20 20 60 100 140 tj/ "c fig. 10. gate threshold voltage. vgsito) = f(tj); conditions: id = 1 ma; vds ? ? ~? 780 = vgs 1e-01 1e-02 i 1e-03 1e-04 - ie-os - id/t =l \ 2% j 5ub- ^ 1 ^ i / thr ^ ty / l= -.sh( ry y= ' / -)ld = -/- ^ ! =lm con 8% 1 dug ^_l_ lj ?-/-- non gs 0 0.4 0.8 1.2 1,6 2 2a vgs/v fig. 1 1. sub-threshold drain current. id - f(vgs>; conditions: tt = 25 c; vds = vgs woooi 1000 100- c/pf $-~? \ ? ^^ -? , ' ? _ ? ? - ? ciss ? coss ? cres 0 20 40 vds/v fig. 12. typical capacitances, ciss, coss, cres. c = f(vds); conditions: vbs = 0 v; f= 1 mhz
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